Version 2 (modified by ph3-der-loewe, 6 years ago) (diff)

makeup fix

Standard I²C Protocol for RoarAudio Devices


RoarAudio Devices with I²C interface provide a standard Memory interface on the bus. Communication with the device is done by reading and writing to memory cells. The Memory is organized into diffrent banks. Each bank is used to access a single command or feature.

The memory structure is as following:

Offset Description
0 Interface Version
1 Device Status
2 Command/Bank ID
3 Device Error
4 Bank data

Interface Version

This is the version of the Interface. This document describes version 0.

Device Status

This is a overall status byte.

Bit Description
0 Device Ready
1 Selfcheck passed
2 Selfcheck returned error
3 Updates since last read
4 Reserved
5 Reserved
6 Reserved
7 Reserved

If bit 1 and 2 is zero selfcheck is currently running. Bit 3 is set after value changes of ADC pins or GPI pins. It is reset when the correspdoning bank (holding the updated value) is selected.

Command/Bank ID

This is the ID of the selected memory bank.

Device Error

This is the device's error code. It is updated after every command/bank change and may be updated on writing command specific parameters. The values are standard RoarAudio Error Values. See Specs/ErrorValues